Mathematical Modeling of Optimal Position of Chips on Printed Circuit Board (PCB)

Abstract

There has been a rapid development of electronic devices and competition among electronic companies to produce smaller and lighter devices with high performance, reliability, and multi-functionality. This results in the adjustment of an increasing number of electronic components called chips. The demand for small shape and size of the devices requires microanalysis in this field. To adjust the maximum number of chips, the space among them should be minimized. However, the problem arises as each of the chips can generate a significant amount of heat, which can degrade the performance of the device, and some chips could be completely damaged due to high temperature. Each component has its own maximum tolerable temperature, and if this temperature exceeds, the component may not function properly or could be damaged completely. Thus, thermal management is an important issue for both electronic components and the board (Printed Circuit Board) where they will be placed. This paper presents the heat distribution on the module, and based on this heat distribution, a modified gradient algorithm has been used to determine the optimal position of the chips on the board. Numerical computations have been performed for a 1D space module, and numerical results are presented graphically for the 1D space module by considering specific configurations and physical properties of chips.